FIG. 4 shows n-channel power MOS-type semiconductor device 1 with a current detection terminal of conventional design. Device 1 is known as a feeding switch and has a structure which prevents a breakdown due to an overcurrent. Such a device has two types of cells (elements or unit structures) whose numbers are in a proportion of m to n. Specifically, these cells are detection cells Q.sub.SE and main cells Q.sub.O connected in parallel. Cells Q.sub.SE and Q.sub.O each may be a MOSFET with common drain terminal D and common gate terminal G. Source terminal S of main cell Q.sub.O is electrically connected, through external detection resistance R.sub.SE, to detection terminal SENSE which is also the source terminal of cell Q.sub.SE. Detection resistance R.sub.SE need not be realized as a resistor exterior to device 1, but may be an internal resistance in the form of diffusion or polysilicon resistance in device 1. The structures of MOSFET cells Q.sub.SE and Q.sub.O, including their channel lengths and widths, are substantially identical. The numbers of detection cells Q.sub.SE and main cells Q.sub.O are hereinafter referred to as N.sub.SE and N.sub.O, respectively. As mentioned before, these numbers are in a proportion of m to n. That is, EQU N.sub.SE :N.sub.O =m:n, (1)
where m&lt;n.
It is desirable to have a MOS-type semiconductor device with a current detection terminal, in which the detection current flowing through the detection resistance is proportional to the ratio m:n of the respective numbers of the detection cells and the main cells.